Rule Violations |
Count |
Clearance Constraint (Gap=0.2mm) (All),(All) |
0 |
Short-Circuit Constraint (Allowed=Yes) (InPolygon),(IsText) |
0 |
Short-Circuit Constraint (Allowed=No) (All),(All) |
0 |
Un-Routed Net Constraint ( (All) ) |
0 |
Modified Polygon (Allow modified: No), (Allow shelved: No) |
0 |
Width Constraint (Min=0.3mm) (Max=1mm) (Preferred=0.6mm) (All) |
0 |
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.4mm) (Air Gap=0.3mm) (Entries=4) (All) |
0 |
Hole Size Constraint (Min=0.6mm) (Max=3.6mm) (All) |
0 |
Hole To Hole Clearance (Gap=0.254mm) (All),(All) |
0 |
Minimum Solder Mask Sliver (Gap=0mm) (All),(All) |
0 |
Silk To Solder Mask (Clearance=0.1mm) (IsPad),(All) |
0 |
Silk to Silk (Clearance=0.1mm) (All),(All) |
0 |
Net Antennae (Tolerance=0mm) (All) |
0 |
Room U_Measure_current4 (Bounding Region = (95mm, 103.265mm, 110.24mm, 112.155mm) (InComponentClass('U_Measure_current4')) |
0 |
Room U_Measure_current3 (Bounding Region = (110.24mm, 103.265mm, 125.48mm, 112.155mm) (InComponentClass('U_Measure_current3')) |
0 |
Room U_Measure_current2 (Bounding Region = (125.48mm, 103.265mm, 140.72mm, 112.155mm) (InComponentClass('U_Measure_current2')) |
0 |
Room U_Detect_current1 (Bounding Region = (140.723mm, 81.675mm, 155.964mm, 103.265mm) (InComponentClass('U_Detect_current1')) |
0 |
Room U_Measure_current7 (Bounding Region = (49.28mm, 103.265mm, 64.52mm, 112.155mm) (InComponentClass('U_Measure_current7')) |
0 |
Room U_Measure_current8 (Bounding Region = (34.04mm, 103.265mm, 49.28mm, 112.155mm) (InComponentClass('U_Measure_current8')) |
0 |
Room U_DCC_Amplifier (Bounding Region = (40.518mm, 64.53mm, 81.792mm, 80.405mm) (InComponentClass('U_DCC_Amplifier')) |
0 |
Room U_Measure_current5 (Bounding Region = (79.76mm, 103.265mm, 95mm, 112.155mm) (InComponentClass('U_Measure_current5')) |
0 |
Room U_Measure_current6 (Bounding Region = (64.52mm, 103.265mm, 79.76mm, 112.155mm) (InComponentClass('U_Measure_current6')) |
0 |
Room U_connector (Bounding Region = (60.71mm, 24.906mm, 130mm, 70.372mm) (InComponentClass('U_connector')) |
0 |
Room U_Detect_current2 (Bounding Region = (125.482mm, 81.675mm, 140.723mm, 103.265mm) (InComponentClass('U_Detect_current2')) |
0 |
Room U_Detect_current7 (Bounding Region = (49.278mm, 81.675mm, 64.519mm, 103.265mm) (InComponentClass('U_Detect_current7')) |
0 |
Room U_Detect_current8 (Bounding Region = (34.039mm, 81.675mm, 49.28mm, 103.265mm) (InComponentClass('U_Detect_current8')) |
0 |
Room U_Detect_current6 (Bounding Region = (64.518mm, 81.675mm, 79.759mm, 103.265mm) (InComponentClass('U_Detect_current6')) |
0 |
Room U_Detect_current4 (Bounding Region = (95mm, 81.675mm, 110.241mm, 103.265mm) (InComponentClass('U_Detect_current4')) |
0 |
Room U_Detect_current5 (Bounding Region = (79.759mm, 81.675mm, 95mm, 103.265mm) (InComponentClass('U_Detect_current5')) |
0 |
Room U_Measure_current1 (Bounding Region = (140.72mm, 103.265mm, 155.96mm, 112.155mm) (InComponentClass('U_Measure_current1')) |
0 |
Room main_v3.0 (Bounding Region = (25.023mm, 25mm, 165.002mm, 125.236mm) (InComponentClass('main_v3.0')) |
0 |
Room U_Detect_current3 (Bounding Region = (110.241mm, 81.675mm, 125.482mm, 103.265mm) (InComponentClass('U_Detect_current3')) |
0 |
Room U_Terminal_block (Bounding Region = (34.04mm, 112.155mm, 155.96mm, 125mm) (InComponentClass('U_Terminal_block')) |
0 |
Height Constraint (Min=0mm) (Max=50mm) (Prefered=10mm) (All) |
0 |
Silk primitive without silk layer |
0 |
Total |
0 |