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dc.contributor.authorBartovský, Jan
dc.contributor.authorDokládal, Petr
dc.contributor.authorFaessel, Matthieu
dc.contributor.authorDokládalová, Eva
dc.contributor.authorBilodeau, Michel
dc.date.accessioned2019-01-28T11:00:12Z-
dc.date.available2019-01-28T11:00:12Z-
dc.date.issued2018
dc.identifier.citationBARTOVSKÝ, J., DOKLÁDAL, P., FAESSEL, M., DOKLÁDALOVÁ, E., BILODEAU, M. Morphological co-processing unit for embedded devices. Journal of Real-Time Image Processing, 2018, roč. 15, č. 4, s. 775-786. ISSN: 1861-8200en
dc.identifier.issn1861-8200
dc.identifier.uri2-s2.0-84937127674
dc.identifier.urihttp://hdl.handle.net/11025/30867
dc.format12 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherSpringeren
dc.rightsPlný text je přístupný v rámci univerzity přihlášeným uživatelům.cs
dc.rights© Springer Verlagen
dc.titleMorphological co-processing unit for embedded devicesen
dc.typečlánekcs
dc.typearticleen
dc.rights.accessrestrictedAccessen
dc.type.versionpublishedVersionen
dc.description.abstract-translatedThis paper focuses on the development of a fully programmable morphological coprocessor for embedded devices. It is a well-known fact that the majority of morphological processing operations are composed of a (potentially large) number of sequential elementary operators. At the same time, the industrial context induces a high demand on robustness and decision liability that makes the application even more demanding. Recent stationary platforms (PC, GPU, clusters) no more represent a computational bottleneck in real-time vision or image processing applications. However, in embedded solutions such applications still hit computational limits. The morphological co-processing unit (MCPU) replies to this demand. It assembles the previously published efficient dilation/erosion units with geodesic units and ALUs to support a larger collection of morphological operations, from a simple dilation to serial filters involving a geodesic reconstruction step. The coprocessor has been integrated into an FPGA platform running a server that is able to respond to client’s requests over the ethernet. The experimental performance of the MCPU measured on a wide set of operations brings as results in orders of magnitude better than another embedded platform, built around an ARM A9 quad-core processor.en
dc.subject.translatedmathematical morphologyen
dc.subject.translatedhardware implementationen
dc.subject.translatedpattern spectrumen
dc.subject.translatedreconstructionen
dc.subject.translatedparallel computationen
dc.identifier.doi10.1007/s11554-015-0518-2
dc.type.statusPeer-revieweden
dc.identifier.document-number452512000006
dc.identifier.obd43924512
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