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dc.contributor.authorHudec, Adam
dc.contributor.authorNagy, Lukáš
dc.contributor.authorKováč, Martin
dc.contributor.authorKohutka, Lukáš
dc.contributor.authorStopjakova, Viera
dc.contributor.editorPinker, Jiří
dc.date.accessioned2020-11-05T10:55:26Z
dc.date.available2020-11-05T10:55:26Z
dc.date.issued2020
dc.identifier.citation2020 International Conference on Applied Electronics: Pilsen, 8th – 9h September 2020, Czech Republic.en
dc.identifier.isbn978-80-261-0891-7 (Print)
dc.identifier.isbn978-80-261-0892-4 (Online)
dc.identifier.issn1803-7232 (Print)
dc.identifier.issn1805-9597 (Online)
dc.identifier.urihttp://hdl.handle.net/11025/39905
dc.format4 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plznics
dc.rights© Západočeská univerzita v Plznics
dc.subjectsledování maximálního výkonucs
dc.subjectrušit a pozorovatcs
dc.subjectvariabilní velikost krokucs
dc.subjectproměnná frekvencecs
dc.titleMaximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technologyen
dc.typeconferenceObjecten
dc.typekonferenční příspěvekcs
dc.rights.accessopenAccessen
dc.type.versionpublishedVersionen
dc.description.abstract-translatedThis paper presents design of a Maximum Power Point Tracking (MPPT) circuit and its functionality for tuning the maximum power transfer from an energy harvester (EH) unit. Simple and practical “Perturb and Observe” (P&O) algorithm is investigated and implemented. We describe the circuit functionality and the improvements that have been introduced to the original algorithm. The proposed MPPT design is divided into three main blocks. The output signal is being generated by the PWM or PFM block. The tracking speed has been enhanced by implementing a variable step size in the “Tracking Block”. Finally, the overall power consumption of the MPPT circuit itself is controlled by the “Power Management Block”, which manages delivering the clock signal to the rest of the circuit. The RTL code of the proposed MPPT has been created in Verilog, synthesized and placed-and-routed in a general purpose 130 nm CMOS technology.en
dc.subject.translatedmaximum power point trackingen
dc.subject.translatedperturb and observeen
dc.subject.translatedvariable step sizeen
dc.subject.translatedvariable frequencyen
dc.type.statusPeer-revieweden
Appears in Collections:Applied Electronics 2020
Applied Electronics 2020

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