Title: Hardware-accelerated ray-triangle intersection testing for high-performance collision detection
Authors: Kim, Sung-Soo
Nam, Seung-Woo
Kim, Do-Hyung
Lee, In-Ho
Citation: Journal of WSCG. 2007, vol. 15, no. 1-3, p. 17-24.
Issue Date: 2007
Publisher: Václav Skala - UNION Agency
Document type: článek
URI: http://wscg.zcu.cz/wscg2007/Papers_2007/journal/!WSCG2007_Journal_Final.zip
ISBN: 978-80-86943-00-8
ISSN: 1213-6972 (hardcopy)
1213-6964 (online)
1213-6980 (CD-ROM)
Keywords: detekce kolizí;grafický hardware;testování průsečíku;sledování paprsku
Keywords in different language: collision detection;graphic hardware;intersection testing;ray tracing
Abstract: We present a novel approach for hardware-accelerated collision detection. This paper describes the design of the hardware architecture for primitive inference testing components implemented on a multi-FPGA Xilinx Virtex-II prototyping system. This paper focuses on the acceleration of ray-triangle intersection operation which is the one of the most important operations in various applications such as collision detection and ray tracing. Also, the proposed hardware architecture is general for intersection operations of other object pairs such as sphere vs. sphere, oriented bounding box (OBB) vs. OBB, cylinder vs. cylinder and so on. The result is a hardware-accelerated ray-triangle intersection engine that is capable of out-performing a 2.8GHz Xeon processor, running a well-known high performance software ray-triangle intersection algorithm, by up to a factor of seventy. In addition, we demonstrate that the proposed approach could prove to be faster than current GPU-based algorithms as well as CPU based algorithms for ray-triangle intersection.
Rights: © Václav Skala - UNION Agency
Appears in Collections:Volume 15, number 1-3 (2007)

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Please use this identifier to cite or link to this item: http://hdl.handle.net/11025/1423

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