Název:	Monitoring of system memory usage embedded in FPGA
Autoři:	Asanza Armijos, Victor Sánchez Chan, Nathaly Saquicela, Rommel Macas Lopez, Luis
Citace zdrojového dokumentu:	2020 International Conference on Applied Electronics: Pilsen, 8th – 9h September 2020, Czech Republic.
Datum vydání:	2020
Nakladatel:	Západočeská univerzita v Plzni
Typ dokumentu:	conferenceObject konferenční příspěvek
URI:	http://hdl.handle.net/11025/39895
ISBN:	978-80-261-0891-7 (Print) 978-80-261-0892-4 (Online)
ISSN:	1803-7232 (Print) 1805-9597 (Online)
Klíčová slova:	FPGA;HPS;vestavěný systém;RAM;DE10 Standard
Klíčová slova v dalším jazyce:	FPGA;HPS;embedded system;RAM;DE10 Standard
Abstrakt v dalším jazyce:	At this moment in the field of FPGA, only RAM tests have been carried out to evaluate its performance but these works have not focused on tracking memory usage in real time, this paper proposes a design for monitoring the memory of an embedded system, in the logical part, making use of the communication between the FPGA and the HPS. In addition, the HPS has implemented a web service that allows to visualize a graph of the monitoring in real time. The proposed design can be an introduction to the development of applications that can be specifically monitored for a component of the embedded system in FPGA, because FPGA is currently being used for different purposes such as machine learning, real-time image processing, mining of Bitcoins, among others. These applications are quite robust, which implies a high demand for processing for the embedded system.
Práva:	© Západočeská univerzita v Plzni
Vyskytuje se v kolekcích:	Applied Electronics 2020 Applied Electronics 2020

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