Title: Implementace genetického algoritmu do obvodu FPGA
Authors: Burian, Petr
Citation: Electroscope. Electrotechnika a informatika 2008.
Issue Date: 24-Oct-2008
Publisher: Západočeská univerzita v Plzni, Fakulta elektrotechnická
Document type: článek
konferenční příspěvek
article
conferenceObject
URI: http://hdl.handle.net/11025/497
http://147.228.94.30/images/PDF/Rocnik2008/Dokt08/Elektronika/burian.pdf
ISBN: 978-80-7043-702-5
ISSN: 1802-4564
Keywords: standardní genetický algoritmus;vyvíjející se obvody
Keywords in different language: standard genetic algorithm;evolvable hardware
Abstract in different language: This paper deals with the implementation of a standard genetic algorithm by an FPGA circuit. It examines the various features of this algorithm. The main goal of this work is building of an evolvable combinational circuit. Demands imposed on an FPGA circuit are researched as well.
Rights: Copyright © 2007-2010 Electroscope. All Rights Reserved.
Appears in Collections:2008
Články / Articles (RICE)
Elektrotechnika a informatika 2008 (2008)
2008

Files in This Item:
File Description SizeFormat 
burian.pdf279,04 kBAdobe PDFView/Open


Please use this identifier to cite or link to this item: http://hdl.handle.net/11025/497

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.