Full metadata record
| DC pole | Hodnota | Jazyk |
|---|---|---|
| dc.contributor.author | Kubař, Miloslav | |
| dc.contributor.author | Jakovenko, Jiří | |
| dc.contributor.editor | Pihera, Josef | |
| dc.contributor.editor | Steiner, František | |
| dc.date.accessioned | 2013-12-18T11:21:38Z | |
| dc.date.available | 2013-12-18T11:21:38Z | |
| dc.date.issued | 2013 | |
| dc.identifier.citation | Electroscope. 2013, č. 5, EEICT + EDS. | cs |
| dc.identifier.issn | 1802-4564 | |
| dc.identifier.uri | http://147.228.94.30/images/PDF/Rocnik2013/Cislo5_2013/r7c5c6.pdf | |
| dc.identifier.uri | http://hdl.handle.net/11025/6620 | |
| dc.format | 6 s. | cs |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | en |
| dc.publisher | Západočeská univerzita v Plzni, Fakulta elektrotechnická | cs |
| dc.relation.ispartofseries | Electroscope | cs |
| dc.rights | © 2013 Electroscope. All rights reserved. | en |
| dc.subject | analogové integrované obvody | cs |
| dc.subject | automatizovaný design | cs |
| dc.subject | počítačové modelování | cs |
| dc.title | A Novel Tool for Automated Design of Analog Integrated Circuits | en |
| dc.type | článek | cs |
| dc.type | article | en |
| dc.rights.access | openAccess | en |
| dc.type.version | publishedVersion | en |
| dc.description.abstract-translated | This paper presents a novel optimization tool, which was made for the design of the analog integrated circuits. The proposed tool is based on the robust version of the differential evolution optimization algorithm. Corners of technology, temperature, voltage and current supplies are taken into account during the optimization. This ensures robust resulting circuits. These circuits usually do not need any schematic change and are ready for the layout. The developed tool is implemented directly to the Cadence design environment to achieve very short setup time of the optimizations. The design automation procedure was enhanced by novel optimization watchdog feature. It was created to control optimization progress and to reduce the search space to produce better circuits in shorter time. Another novel feature for accurate design of current mirrors was created and implemented to the tool. The novel tool and features were successfully tested by optimization of two design examples. | en |
| dc.subject.translated | analog integrated circuits | en |
| dc.subject.translated | automated design | en |
| dc.subject.translated | computer modelling | en |
| dc.type.status | Peer-reviewed | en |
| Vyskytuje se v kolekcích: | Číslo 5 (2013) Číslo 5 (2013) | |
Soubory připojené k záznamu:
| Soubor | Popis | Velikost | Formát | |
|---|---|---|---|---|
| r7c5c6.pdf | Plný text | 188,01 kB | Adobe PDF | Zobrazit/otevřít |
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