Title: Speedup and accuracy of parallel simulated annealing algorithms
Authors: Wieczorek, Bożena
Połomski, Marcin
Citation: CPEE – AMTEE 2013: Joint conference Computational Problems of Electrical Engineering and Advanced Methods of the Theory of Electrical Engineering: 4th – 6th September 2013 Roztoky u Křivoklátu, Czech Republic, p. IX-1.
Issue Date: 2013
Publisher: University of West Bohemia
Document type: konferenční příspěvek
URI: http://hdl.handle.net/11025/11634
ISBN: 978-80-261-0247-2
Keywords: simulované žíhání;paralelní výpočty;problém směrování vozidel
Keywords in different language: simulated annealing;parallel computing;vehicle routing problem
Abstract: This work presents two parallel simulated annealing algorithms to solve the vehicle routing problem with time windows (VRPTW). The aim is to explore speedups and investigate how the shorter annealing chains (ISR algotithm) and the shorter number of cooling stages (ISC algorithm) influence the accuracy of solutions to the problem.
Rights: © University of West Bohemia
Appears in Collections:CPEE – AMTEE 2013

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